Design Verification Engineer

Job description

We are looking for outstanding design verification engineers with a passion to verify the correctness of the hardware design. The candidates will learn the full hardware verification flow and process and become experts in the design verification area using the most popular EDA tools:

  • Develop a verification environment of the block, system, and chip levels.
  • Develop entire verification flow including test plan, implementation (tests and simulation), and coverage collection.
  • Implement design using Verilog HDL/VHDL.
  • Develop methodologies, scripts, and infrastructure improvements.


Fresh Graduates \undergraduates who will be graduated this semester are welcome to apply as well.

Job requirements

  • B.Sc. in Computer/Electrical/Electronic Engineering.
  • Knowledge of Object-Oriented Programming (OOP) is a must.
  • Knowledge of data structure and algorithms is a must.
  • Knowledge of Digital/Analog circuits is a must.
  • Knowledge of Hardware Description Language (Verilog HDL or VHDL) is a must.
  • Knowledge of Unix/Linux – advantage.
  • Knowledge of integration, debugging, functional verification, and test plan development – advantage.
  • Knowledge of system level, chip level, and Block level verification and test bench development – advantage.
  • Strong communication skills.
  • Independent learner\worker and problem-solver.
  • Out of the box thinking.